1. Field of the Invention
This invention relates to a semiconductor device manufacturing method including patterning using a mask material formed on the sidewall of a core pattern.
2. Background Art
In general, downscaling of a circuit pattern in a semiconductor device requires improvement in exposure wavelength and numerical aperture NA for lithography. As an approach to improvement in numerical aperture NA, the so-called immersion exposure technique is in practical use, which performs light exposure while the space between the objective lens and the semiconductor wafer is filled with pure water. However, the development of device shrinkage is requiring downscaling beyond the resolution limit of immersion exposure systems.
One technique for realizing a finer pattern beyond the limit of such lithography techniques is known as the sidewall transfer process and disclosed in, e.g., U.S. Pat. No. 6,063,688. In this technique, a line pattern serving as a core is formed on a foundation film, and then a mask material made of a different material is formed on the sidewall portion of the line pattern. After the core pattern is removed, the remaining mask material is used as a mask to process the foundation film, thereby forming a fine pattern in the foundation film.
However, in this sidewall transfer process, there is concern about problems resulting from the increased number of process steps, such as increase in line width variation, increase of defects due to particles attached during interprocess transfer, and hence yield decrease.